JG в 2016 (и все-таки он вертится) | страница 11 (Elite Games)

Код:

module mem2st (
   input wire clock,
   input wire reset,
   input wire stout_ready,
   output wire stout_valid,
   output wire [23:0] stout_data,
   output wire stout_sof,
   output wire stout_eof,
   inout wire [7:0] gpio
);

parameter WIDTH = 800;
parameter HEIGHT = 600;
reg [23:0]packet[4];
reg [7:0] packet_cnt;

reg valid;

reg [7:0] reg_gpio;

assign stout_valid = (valid & stout_ready);
assign gpio = reg_gpio;

reg [23:0] data;
reg eof;
reg sof;

reg [15:0] x;
reg [15:0] y;

reg [15:0] anim_x;

assign stout_data = data;

assign stout_sof = sof;
assign stout_eof = eof;

initial begin
   packet[0][23:16] <= 8'h00;
   packet[0][15:8] <= 8'h00;
   packet[0][7:0] <= 8'h0f;

   packet[1][23:16] <= 8'h02;
   packet[1][15:8] <= 8'h03;
   packet[1][7:0] <= 8'h00;

   packet[2][23:16] <= 8'h02;
   packet[2][15:8] <= 8'h00;
   packet[2][7:0] <= 8'h00;

   packet[3][23:16] <= 8'h02;
   packet[3][15:8] <= 8'h08;
   packet[3][7:0] <= 8'h05;

   st_state <= 0;
   valid <= 0;
   sof <= 0;
   eof <= 0;
end

reg [7:0] st_state;

always @(posedge clock, negedge reset) begin
   if(!reset) begin
      reg_gpio <= 8'h00;
   end else if(stout_ready) begin
      case(st_state)
         8'h00: begin
            packet_cnt <= 0;
            st_state <= 1;

         end

         8'h01: begin
            packet_cnt <= packet_cnt + 1;
            valid <= 1;
            if(packet_cnt < 4) begin
               data <= packet[packet_cnt][23:0];
            end

            if(packet_cnt > 3) begin
               st_state <= 2;
               valid <= 0;
            end

            if(packet_cnt == 0) begin
               sof <= 1;
            end else begin
               sof <= 0;
            end

            if(packet_cnt == 3) begin
               eof <= 1;
            end else begin
               eof <= 0;
            end

         end

         8'h02: begin
            valid <= 1;
            x <= 0;
            y <= 0;
            sof <= 1;
            data <= 0;
            st_state <= 3;
         end

         8'h03: begin
            sof <= 0;
            x <= x + 1'b1;
            if(x == WIDTH - 1) begin
               eof <= 1;
               st_state <= 4;
               valid <= 0;
            end

            if((x == anim_x)) begin
               data <= 24'hFFFFFF;
            end else begin
               data <= 24'h000000;
            end
         end

         8'h04: begin
            eof <= 0;
            y <= y + 1'b1;
            x <= 0;
            if(y == HEIGHT - 1) begin
               eof <= 1;
               st_state <= 0;
               if(anim_x<800) begin
                  anim_x <= anim_x + 1;
               end else begin
                  anim_x <= 0;
               end
            end else begin
               st_state <= 3;
               valid <= 1;
            end
         end

      endcase
   end
end

endmodule